Type of Document Dissertation Author Srirattana, Nuttapong Author's Email Address nsrirat@ece.gatech.edu, koe372@yahoo.com URN etd-04092005-191852 Title High-Efficiency Linear RF Power Amplifiers Development Degree Doctor of Philosophy Department Electrical and Computer Engineering Advisory Committee
Advisor Name Title Phillip E. Allen Committee Chair Joy Laskar Committee Co-Chair John D. Cressler Committee Member John Papapolymerou Committee Member Paul A. Kohl Committee Member Ye Li Committee Member Keywords
- CMOS
- doherty amplifiers
- code-division multiple access
- efficiency enhancement
- MOSFET
- transistor modeling
- substrate coupling
- scalable models
- SiGe HBTs
- mobile communications
- integrated circuits
- GaAs MESFETs
Date of Defense 2005-04-11 Availability unrestricted Abstract Next generation mobile communication systems require the use of linear RF power amplifier for higher data transmission rates. However, linear RF power amplifiers are inherently inefficient and usually require additional circuits or further system adjustments for better efficiency. This dissertation focuses on the development of new efficiency enhancement schemes for linear RF power amplifiers.
The multistage Doherty amplifier technique is proposed to improve the performance of linear RF power amplifiers operated in a low power level. This technique advances the original Doherty amplifier scheme by improving the efficiency at much lower power level. The proposed technique is supported by a new approach in device periphery calculation to reduce AM/AM distortion and a further improvement of linearity by the bias adaptation concept.
The device periphery adjustment technique for efficiency enhancement of power amplifier integrated circuits is also proposed in this work. The concept is clearly explained together with its implementation on CMOS and SiGe RF power amplifier designs. Furthermore, linearity improvement technique using the cancellation of nonlinear terms is proposed for the CMOS power amplifier in combination with the efficiency enhancement technique.
In addition to the efficiency enhancement of power amplifiers, a scalable large-signal MOSFET model using the modified BSIM3v3 approach is proposed. A new scalable substrate network model is developed to enhance the accuracy of the BSIM3v3 model in RF and microwave applications. The proposed model simplifies the modeling of substrate coupling effects in MOS transistor and provides great accuracy in both small-signal and large-signal performances.
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